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DS1922E
iButton High-Temperature Logger with
8KB Data-Log Memory
1-Wire Signaling
The DS1922E requires strict protocols to ensure data
integrity. The protocol consists of four types of signaling
on one line: reset sequence with reset pulse and pres-
ence pulse, write-zero, write-one, and read-data. Except
for the presence pulse, the bus master initiates all these
signals. The DS1922E can communicate at two different
speeds: standard speed and overdrive speed. If not
explicitly set into the Overdrive Mode, the DS1922E
communicates at standard speed. While in Overdrive
Mode the fast timing applies to all waveforms.
To get from idle to active, the voltage on the 1-Wire line
needs to fall from V PUP below the threshold V TL . To get
from active to idle, the voltage needs to rise from V IL-
MAX past the threshold V TH . The time it takes for the
voltage to make this rise is seen in Figure 12 as “ ε ” and
its duration depends on the pullup resistor (R PUP ) used
and the capacitance of the 1-Wire network attached.
The voltage V ILMAX is relevant for the DS1922E when
determining a logical level, not triggering any events.
The initialization sequence required to begin any com-
munication with the DS1922E is shown in Figure 12. A
reset pulse followed by a presence pulse indicates the
DS1922E is ready to receive data, given the correct
ROM and memory function command. If the bus master
uses slew-rate control on the falling edge, it must pull
down the line for t RSTL + t F to compensate for the edge.
A t RSTL duration of 690μs or longer exits the Overdrive
Mode, returning the device to standard speed. If the
MASTER Tx "RESET PULSE"
V PUP
V IHMASTER
V TH
V TL
V ILMAX
ε
DS1922E is in Overdrive Mode and t RSTL is no longer
than 80μs, the device remains in Overdrive Mode.
After the bus master has released the line, it goes into
receive mode (Rx). Now the 1-Wire bus is pulled to
V PUP through the pullup resistor or, in the case of a
DS2480B driver, through active circuitry. When the
threshold V TH is crossed, the DS1922E waits for t PDH
and then transmits a presence pulse by pulling the line
low for t PDL . To detect a presence pulse, the master
must test the logical state of the 1-Wire line at t MSP .
The t RSTH window must be at least the sum of
t PDHMAX , t PDLMAX , and t RECMIN . Immediately after
t RSTH is expired, the DS1922E is ready for data com-
munication. In a mixed population network, t RSTH
should be extended to minimum 480μs at standard
speed and 48μs at overdrive speed to accommodate
other 1-Wire devices.
Read/Write Time Slots
Data communication with the DS1922E takes place in
time slots that carry a single bit each. Write time slots
transport data from bus master to slave. Read time slots
transfer data from slave to master. The definitions of the
write and read time slots are illustrated in Figure 13.
All communication begins with the master pulling the
data line low. As the voltage on the 1-Wire line falls
below the threshold V TL , the DS1922E starts its internal
timing generator that determines when the data line is
sampled during a write time slot and how long data is
valid during a read time slot.
MASTER Rx "PRESENCE PULSE"
t MSP
0V
t RSTL
t PDH
t PDL
t REC
t F
t RSTH
RESISTOR
Figure 12. Initialization Procedure: Reset and Presence Pulse
34
MASTER
DS1922E
Maxim Integrated
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